PHY Team Leader – Front End Design

Employment Type: Permanent, full-time

Location: Bristol

Date: November 2018

Job Description

We are looking for a technically exceptional and enthusiastic individual with established leadership skills, to lead a team of world class front-end designers.

About the Role:

Blu Wireless Technology (BWT) develops cutting-edge wireless Gb/s technology, based on the 802.11ad/ay mmWave standard. With the initial core technology developed and demonstrated through several successful SoC designs, we are now moving forward to deliver a road-map based HYDRA system IP to our growing customer base.  We are looking for a capable and enthusiastic senior front-end design engineer, reporting to the BWT VP Front-End Design, to lead our PHY front-end team through the IP delivery milestones to BWT front-end integration, verification, and implementation teams.

What will I be accountable for?

The following items apply to the PHY team for which the candidate is responsible for:

  • Interfacing with BWT Modem team which provides complex PHY algorithms to the PHY front-end team; and with the other front-end teams for integration into HYDRA and the SoC level.
  • Micro-architecting the PHY IP with focus on area, power consumption, high speed processing.
  • Writing specifications at block levels to meet marketing and system level requirements for the PHY.
  • Coding hardware and firmware for the PHY.
  • Bringing support to the verification and implementation teams.
  • Contributing to the front-end design flow, methodology, 3rd party’s IP and EDA tools evaluation.
  • Tracking the PHY project level milestones, reviews, and check-lists.

Job Requirements


  • Masters or PhD or proof of experience to that level in the field.


The following skills are desirable, and applicants should have experience of some or all of these techniques:

  • Excellent background in digital communication theory.
  • Strong DSP architectural and design knowledge, ideally in wireless protocols (802.11ad/ay is a plus).
  • Excellent front-end design knowledge and experience.
  • Strong team leadership and good communicator and team worker.
  • Ability to work in a highly motivated commercially driven environment.
  • System-Verilog design entry, RTL synthesis. High-level synthesis with system-C is a plus.

More About Us

We are a friendly and welcoming team located in the heart of Bristol, offering a competitive salary and equity scheme, in addition to lifestyle benefits.

We are rapidly becoming a leading supplier of multi-gigabit baseband System IP to the emerging multi-billion dollar 4G backhaul and gigabit WiFi market.

Exploiting Bristol’s long heritage in parallel computing and consumer electronics technology, we have developed our powerful HYDRA baseband architecture that provides significant cost, power and performance advantages over competing solutions.  This highly optimal, but flexible, architecture provides our customers with access to dynamic DSP algorithms for SC-FDE, OFDM and beam tracking so achieving world class performance in mmWave data communication.

We endeavour to respond quickly to all applications so if interested please submit your CV with a short covering note to

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